1. Field
The present invention relates to a steering control system for use in the automobile or the like.
2. Description of the Related Art
FIG. 7 is a diagram showing a steering control system having two CPUs, which is disclosed in JP-B-2915234. A sub-CPU 1001 is connected to a main CPU 1000 via a data bus 1004A. Also, the sub-CPU 1001 drives a logical circuit 1008, 1009 with an output signal SKR, SKL, and enables a motor drive circuit 1007 to limit the drive direction of a motor 5 with a drive direction signal SIR, SIL of the main CPU 1000. The control unit 100 includes an H-bridge circuit configured by field effect transistors (FET) Q1 to Q4 for supplying power to the motor 5.
The operation will be described below. The main CPU 1000 computes the drive direction of the motor 5, based on a detection result of a torque sensor 3, and sends the drive direction of the motor 5 that is the computation result to the sub-CPU 1001 via the data bus 1004A. The sub-CPU 1001 compares a steering wheel torque signal ST from the torque sensor 3 with the drive direction from the main CPU 1000, and if both are unmatched, determines a failure and outputs the output signal SKR, SKL to inhibit the driving of the motor 5.
The above steering control system is configured in the above manner, and is difficult to apply as the steering control system that inputs drive information of the vehicle such as vehicle speed via an on-board LAN from the outside. Also, it is difficult to make the motor drive control in which the drive direction and the steering wheel torque are unmatched such as the motor drive control in response to a signal sent via the on-board LAN from the external on-board control system.